Myticas Consulting - 9 emplois
Ottawa, ON
Posté hier
Détails de l'emploi :
Temps plein
Expérimenté
Job DescriptionOur client is seeking a highly experienced ASIC Verification Engineer to help develop and verify complex digital ASICs in a collaborative, geographically diverse environment.
Key Responsibilities
Key Responsibilities
- Lead the development of verification infrastructure for advanced ASIC designs
- Create System Verilog/UVM-based protocol and traffic generators/checkers
- Develop and execute test plans based on functional and standards requirements
- Define, develop, and run self-checking tests for complex digital ASICs
- Bachelor's degree in computer science or electrical engineering (master's preferred)
- 8+ years of experience in ASIC verification
- Proven experience in developing and implementing test plans at block or sub-chip levels
- Proficiency in System Verilog and scripting languages such as Python
- Deep understanding of UVM methodology
- Experience with assertions, functional coverage, code coverage, and formal verification tools
- Strong communication skills and ability to work effectively in a distributed team
- Knowledge of DSP and/or FEC technologies
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Foire aux questions
The role is an ASIC Verification Engineer based in Ottawa, ON, and is a full-time position.
The position requires 8+ years of experience in ASIC verification and a bachelor's degree in computer science or electrical engineering (master's preferred).
Candidates should have proficiency in System Verilog and Python, a deep understanding of UVM, and experience with assertions, functional and code coverage, and formal verification tools.
You will lead the development of verification infrastructure, create System Verilog/UVM-based protocol and traffic generators/checkers, develop and execute test plans, and define self-checking tests for complex digital ASICs.
The listing indicates the location as Ottawa, ON, and notes it as a remote position in the keywords, but the official location is Ottawa, ON.
Preferred skills include knowledge of DSP and/or FEC technologies.
The role emphasizes distributed teamwork, strong communication, and experience with block or sub-chip level test plans, along with verification methodology like UVM.
