We are looking for Senior Design Verification Engineer for our client in Ottawa, ON

Job Title: Senior Design Verification Engineer

Job Location: Ottawa, ON

Job Type: Contract
Job Description:

Responsibilities:

• Develop/Maintain tests for functional verification with UVM verification at the subsystem level.
• Build test bench components to support the next generation IP.
• Maintain or improve current test libraries to support IP level testing.
• Technically lead IPs in Control Fabric.
• Have exposure to AXI protocol and Boot code Verification.
• Provide technical support to other teams.

Preferred Experience:

• 5+ years' experience required.
• Good at C/C++.
• Good at SV and UVM.
• Good scripting knowledge in Perl, Ruby and Make file.
• Familiarity with System Verilog and modern verification libraries like UVM.

Academic Credentials:

• Bachelors (required) or Masters degree in computer engineering/Electrical Engineering.