Role :- Memory Layout Engineer:

Location :- Ottawa , Onsite

Job Responsibilities:

• Lead the design and development of memory layouts for complex ICs, including:
• High-density SRAM memories
• Specialty memory blocks (e.g., memory, CAM)
• Define memory architecture and sub-block specifications
• Develop and implement advanced layout techniques for low-power, high-speed memory design
• Collaborate with design and verification teams to ensure seamless integration
• Mentor junior engineers and provide technical guidance
• Stay up-to-date on the latest memory design trends and technologies
• Perform comprehensive physical verification using DRC, LVS, and other tools
• Drive Design for Manufacturability (DFM) and Design for Yield (DFY) initiatives
• Analyze layouts for potential power integrity and signal integrity issues
• May involve scripting automation for layout tasks using languages like PERL, Shell, TCL, or Skill

Thanks & Regards

Akash Verma

Raas Infotek Corporation.

262 Chapman Road, Suite 105A, Newark, DE -19702

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