Job Title or Location

ASIC Digital Design, Sr Engineer

Synopsys, Inc.
Mississauga, ON
Experienced
Posted 14 days ago

At Synopsys , we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

ASIC Digital Design, Senior Engineer

We are seeking a digital verification engineer with exceptional theoretical and practical background in high-speed data recovery circuits . Working as part of a experienced mixed-signal design team , the candidate will be involved in v erifying next generation PAM and NRZ SERDES products spanning multiple protocols like Ethernet and PCIe. The position offers an excellent opportunity to work with experienced team of digital and mixed signal engineers accountable for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.

Main Responsibilities:

  • Writing modular constrained-random Verilog and system-Verilog testbenches.
  • Performing functional coverage,
  • Assertion coverage, and code coverage;
  • Creating and tracking testplans;
  • Evaluating failure cases and running gate-level simulations.

Key Qualifications:

  • MSEE with some digital verification industry experience
  • Hands-on experience in writing complex testcases in Verilog and System Verilog,
  • Must have familiarity with code quality metrics.

Preferred Experience:

  • Knowledge of the following:
  • high-speed digital & mixed-signal design
  • asynchronous clock crossings
  • DFT design methodologies

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact [email protected].
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