Senior ASIC Design Engineer

Company: Scaledge Technology Ltd.

Job Type: Permanent, Full-Time
Location: British Columbia, Canada
Work Arrangement: On-site / Hybrid

Scaledge Technology Ltd. is seeking an experienced ASIC Design Verification Manager to lead and manage engineering activities related to ASIC, SoC, IP and subsystem design verification.

The successful candidate will provide technical and project leadership to verification engineering teams, oversee verification planning and execution, coordinate engineering resources, and work with cross-functional teams to deliver high-quality semiconductor products.

This position combines engineering leadership, project coordination, team management and hands-on technical knowledge of ASIC/SoC verification methodologies.

Key Responsibilities

• Plan, organize, direct and evaluate ASIC, SoC, IP and subsystem design verification activities.
• Lead and provide technical direction to ASIC design verification engineers and senior verification engineers.
• Manage project schedules, engineering resources, task assignments, milestones and technical deliverables.
• Develop and implement verification strategies, verification plans, test plans, test suites, coverage objectives and verification closure criteria.
• Lead the development and maintenance of verification environments using SystemVerilog and UVM methodologies.
• Oversee verification activities at the IP, subsystem and SoC levels.
• Review verification results, regression reports, functional coverage and code coverage and coordinate activities required for verification closure.
• Guide engineers in test-case development, debugging and resolution of complex RTL and verification issues.
• Coordinate technical activities between verification, design, firmware and other engineering teams.
• Support development and implementation of verification methodologies, reusable verification components and verification infrastructure.
• Monitor project progress, engineering productivity, quality and delivery against project schedules and customer requirements.
• Communicate project status, technical issues, milestones and deliverables to internal management and customers.
• Assign work, provide technical guidance and support the professional development of engineering team members.
• Participate in recruitment, mentoring, coaching and performance evaluation of engineering personnel.
• Support continuous improvement of engineering processes, verification methodologies and project execution practices.

Required Qualifications

• Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related engineering/technology discipline.
• 8+ years of professional experience in ASIC, semiconductor, SoC, IP, FPGA or electronic design verification.
• 3+ years of experience providing technical leadership, project coordination or supervision of engineering teams.
• Experience developing or managing ASIC, IP, subsystem and/or SoC verification environments.
• Strong experience with SystemVerilog and UVM verification methodologies.
• Experience developing verification strategies, test plans, test suites, coverage models and verification closure plans.
• Experience with functional coverage, code coverage, regression analysis and verification debugging.
• Experience working with one or more semiconductor protocols or interfaces such as PCIe, CXL, AMBA AXI/APB/AHB, USB, Ethernet or similar technologies.
• Experience coordinating technical activities across verification, design, firmware or other engineering teams.
• Experience planning engineering activities, tracking project milestones and coordinating technical deliverables.
• Strong written and verbal communication skills.
• Ability to lead, mentor and coordinate technical engineering teams.

Preferred Qualifications

• Experience with high-speed interface or subsystem verification.
• Experience with PCIe, CXL, AMBA or other high-speed/interconnect protocols.
• Experience developing verification environments from the ground up.
• Experience with verification IP/VIP development.
• Experience working with semiconductor customers or geographically distributed engineering teams.
• Experience with industry-standard verification tools such as VCS, QuestaSim, ModelSim, Verdi or equivalent.